Semiconductor layer-to-layer overlay in manufacturing significantly impacts product quality and yield performance. Good control of device shifting also influences the spatial scale down for the nanoelectronics of memory applications. Advanced node DRAM semiconductor manufacturing requires a tighter in-die overlay budget. Typically, the inline overlay is measured by using a designed target in the scribe line. However, the difference between the metrology target and in-die device structure can lead to errors that can impact product quality and yield. This is especially true for complex structures such as the DRAM storage hole to landing pad overlay that cannot be well fabricated in the small target area. To meet the required tighter overlay control budget, the ability to measure in-die is essential. In this work, we introduce and demonstrate the line scan self-calibration solution for accurate and robust in-die overlay measurement of the storage node layer to the landing pad layer. Real spectra are collected by SpectraShape 11k dimensional metrology system where overlay splits are trained against the intended overlay and the SpectraShape 11k in-device overlay results are qualified by Set (designed overlay value from lithography), Get (overlay value measured by metrology tool) and TEM. Moreover, theoretical and experimental data show that the SpectraShape 11k Mueller elements are sensitive to tiny changes in the overlay parameters, which can enable robust, inline, high throughput overlay metrology. We demonstrate that the SpectraShape 11k successfully measures the in-die overlay of the complex storage hole to the landing pad structure with good accuracy and high throughput thereby contributing to improved process control and yield improvement.
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