KEYWORDS: Metrology, Optical parametric oscillators, Optical design, Overlay metrology, 3D acquisition, 3D metrology, Integrated circuits, Manufacturing, Logic, Process control
On product overlay (OPO) shrink is a key enabler to achieve high yield in integrated circuit manufacturing. One of the key factors to enable accurate measurement on grid (target) is the use of optimized overlay (OVL) mark design to achieve low OPO. The OVL mark design enables accurate and robust OVL metrology and improves measurability and basic performance requirements such as total measurement uncertainty (TMU). In this paper, we demonstrate the methodology of mark design for different devices based on simulations, measurements and verification. We compare OVL performance of AIM® targets and grating-over-grating imaging targets utilizing the Moiré effect. Methodologies described in this work utilize robust AIM (rAIM™) targets, target design from the MTD AcuRate™ simulation-based OVL metrology target design tool, and the Archer™ OVL metrology system.
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