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Luis Serrano
at Univ Publica de Navarra
SPIE Involvement:
Author
Publications (1)
Proceedings Article | 29 June 2005 Paper
A novel low-voltage low-power analogue VLSI implementation of neural networks with on-chip back-propagation learning
Manuel Carrasco, Andres Garde, Pilar Murillo, Luis Serrano
Proceedings Volume 5839, (2005) https://doi.org/10.1117/12.608794
KEYWORDS: Neurons, Neural networks, Very large scale integration, Logic, Capacitors, Prototyping, Switches, Data hiding, Molybdenum, Transistors
Conference Committee Involvement (4)
Bioelectronics, Biomedical, and Bio-inspired Systems
19 April 2011 | Prague, Czech Republic
Bioengineered and Bioinspired Systems
4 May 2009 | Dresden, Germany
Bioengineered and Bioinspired Systems
2 May 2007 | Maspalomas, Gran Canaria, Spain
Bioengineered and Bioinspired Systems II
9 May 2005 | Sevilla, Spain
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