Single photon detection has a wide variety of scientific and industrial applications including optical time domain
reflectometry, astronomy, spectroscopy, defect monitoring of Complementary Metal Oxide Semiconductor (CMOS)
circuits, fluorescence lifetime measurement and imaging. In imaging applications, the dead time is the time during
which the detector is inhibited after a photon has been detected. This is a limiting factor on the dynamic range of the
pixel. The rate of photon detection will saturate if the dead time is too large. Time constants generated by Metal Oxide
Semiconductor (MOS) transistor bulk and sidewall capacitances adversely affect the dead time of pixels developed in
conventional CMOS technology. In this paper, a novel imaging pixel configuration based on a Geiger Mode Avalanche
Photodiode (GMAP) and fabricated using a dedicated hybrid bulk Silicon On Insulator (SOI) CMOS process is
presented. The GMAP is fabricated in the bulk layer and the CMOS circuitry is implemented in the upper SOI layers.
As a result, bulk and sidewall capacitance effects are significantly reduced. As both the diode and the CMOS transistors
are on the same wafer there is a reduction in pixel area and an additional reduction in the parasitic capacitance effects.
This leads to a significant improvement in pixel performance. Pixels incorporating 5 micron and 10 micron diameter
GMAPs have been simulated. The circuits were optimised with a view to maximising the photon count rate. Results
show a significant improvement in the dead time with values of 14 nanoseconds and 15 nanoseconds being observed for
the 5 micron and 10 micron GMAPs respectively.
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