Presentation + Paper
10 April 2024 Manufacturing-friendly curvilinear standard cell design
Ryoung-Han Kim, Apoorva Oak, Yasser Sherazi, Gioele Mirabelli, Soobin Hwang, Kiho Yang, Hsinlan Chang
Author Affiliations +
Abstract
The integration of curvilinear shapes in semiconductor technology is explored. Curvilinear shapes are classified into forms using Manhattan, rectilinear, and curvilinear representations. The primary objectives of employing curvilinear shapes in Optical Proximity Correction (OPC) and mask technology are identified as error reduction and the effective representation of complex shapes. Leveraging the path optimization characteristic inherent in curvilinear shapes, their utilization was studied for semiconductor layout design. Standard cell design serves as a demonstrative example to highlight these benefits. Using the DTCO Power-Performance-Area-Cost (PPAC) assessment metric, enhancements in both electrical performance and cost efficiency are showcased, compared with designs using Manhattan shapes. We propose a step-by-step adoption strategy of curvilinear design, ranging from restrictive to partial use, and even free-form routing. In addition, we address concerns regarding data volume, outlining how curvilinear representation can effectively mitigate such issues, in OPC, mask technology and layout designs.
Conference Presentation
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Ryoung-Han Kim, Apoorva Oak, Yasser Sherazi, Gioele Mirabelli, Soobin Hwang, Kiho Yang, and Hsinlan Chang "Manufacturing-friendly curvilinear standard cell design", Proc. SPIE 12954, DTCO and Computational Patterning III, 1295405 (10 April 2024); https://doi.org/10.1117/12.3009888
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KEYWORDS
Design

Metals

Optical proximity correction

Semiconductors

Optical lithography

Logic

Photomasks

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