Mr. Guobin Bai Profile

Guobin Bai

at Institute of Microelectronics of the CAS

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Publications (2)

Proceedings Article | 1 May 2023 Poster + Paper

Modeling of SiNx growth by chemical vapor deposition in nanosheet indentation

Hua Shao, Panpan Lai, Junjie Li, Guobin Bai, Qi Yan, Junfeng Li, Tao Yang, Rui Chen, Yayi Wei

Proceedings Volume 12499, 124990L (2023) https://doi.org/10.1117/12.2658152

KEYWORDS: Plasma enhanced chemical vapor deposition, Low pressure chemical vapor deposition, Silicon nitride, Chemical vapor deposition, Nanosheets, Monte Carlo methods, Particles, Modeling, Transistors, Solids

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Gate-all-around nanosheet (GAA-NS) transistors are commonly considered to be most competitive logic device in the future. In the GAA nanosheet transistor device fabrication process, the inner spacer formation is a critical step as it physically isolates the gate from the source/drain, and defines the gate length. After the selective lateral etch of the SiGe in alternative Si/SiGe stack, inner spacer material is deposited and SiN_x is commonly used. This gap filling process demands for highly uniform growth of materials in order to minimize transistor variability. As moving to three-dimensional stacked structure, lateral open features bring challenges to conventional deposition manners such as chemical vapor deposition (CVD). In our previous work, we have compared the filling performance between low-pressure chemical vapor deposition (LPCVD) and plasma enhanced chemical vapor deposition (PECVD), and demonstrated good SiN_x growth conformity by LPCVD in Si/SiGe indentation cavities. The cavity geometry was also found to pose significant impact on growth profile. However these works were carried out on isolated Si/SiGe nanosheet structure without neighboring unit. CVD process performance may degrade when moving from isolated to dense structures, especially when the critical dimension goes into tens of nanometers. In this paper, we present our latest simulation progress on the profile evolution of SiN_x CVD in dense Si/SiGe nanosheet structures with varying geometry and density of units. The SiN_x profile simulation indicates that LPCVD still maintains promising coverage performance in cavities, the SiN_x film thickness in the inner and outer side of unit are pretty close, while necking signature emerges near the unit top as process time increases. In contrast, PECVD exhibits pin holes within the cavity at the beginning of process, and the necking effect is relatively severe both in the cavity and near top of unit. We conduct systematic study on periodic stack structure array with different SiGe indentations. Pin holes are observed and get more pronounced in the PECVD process when the space between units is narrowed down. As the indentation decreases, pin holes become much smaller and exhibit better filling performance inside the lateral cavity.

Proceedings Article | 25 May 2022 Presentation + Paper

Modeling of SiN inner spacer deposition in gate-all-around nanosheet FET process

Hua Shao, Rui Chen, Junjie Li, Guobin Bai, Chen Li, Qi Yan, Yayi Wei

Proceedings Volume 12055, 1205502 (2022) https://doi.org/10.1117/12.2612445

KEYWORDS: Low pressure chemical vapor deposition, Plasma enhanced chemical vapor deposition, Scanning electron microscopy, Silicon, Ions, Field effect transistors, Transmission electron microscopy, Process modeling, Deposition processes, Computer simulations

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