Dr. Jean Gabriel Simiz Profile

Dr. Jean Gabriel Simiz

RET / OPC Engineer at STMicroelectronics

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Publications (6)

Proceedings Article | 28 April 2023 Poster + Paper

Robust and automated methodology for scanner matching using contour-based analysis

Jean Gabriel Simiz, Romain Alestra, Romain Bange, Julien Ducoté, Florent Dettoni, Pierre Fanton

Proceedings Volume 12494, 1249412 (2023) https://doi.org/10.1117/12.2657686

KEYWORDS: Scanners, Light sources and illumination, Semiconducting wafers, Contour extraction, Image filtering, Lithography, Automation, Scanning electron microscopy

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Proceedings Article | 28 March 2017 Paper

Advanced in-production hotspot prediction and monitoring with micro-topography

P. Fanton, T. Hasan, A. Lakcher, B. Le-Gratiet, C. Prentice, J.-G. Simiz, R. La Greca, L. Depre, S. Hunsche

Proceedings Volume 10145, 101450X (2017) https://doi.org/10.1117/12.2260024

KEYWORDS: Semiconducting wafers, Metrology, Optical lithography, Electron beam lithography, Scanners, Finite element methods, Scanning electron microscopy, Lithography, Inspection, Computational lithography

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Proceedings Article | 16 March 2016 Paper

Verification and application of multi-source focus quantification

J.-G. Simiz, T. Hasan, F. Staals, B. Le-Gratiet, W. Tel, C. Prentice, J.-W. Gemmink, A. Tishchenko, Y. Jourlin

Proceedings Volume 9781, 97810S (2016) https://doi.org/10.1117/12.2219143

KEYWORDS: Scanners, Design for manufacturability, Manufacturing, Product engineering, Reticles, Visualization, Image resolution, Chemical mechanical planarization, Sensors, Time metrology, Data modeling, Semiconducting wafers, Optical lithography, Performance modeling, Photomasks

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Proceedings Article | 8 March 2016 Paper

Process window optimizer for pattern based defect prediction on 28nm metal layer

P. Fanton, R. La Greca, V. Jain, C. Prentice, J.-G. Simiz, S. Hunsche, B. Le-Gratiet, L. Depre

Proceedings Volume 9778, 97782O (2016) https://doi.org/10.1117/12.2220295

KEYWORDS: Semiconducting wafers, Process control, Metals, Photomasks, Data processing, Defect detection, 3D modeling, Image processing, Lithography, Computational lithography, Scanners, Finite element methods, Optical lithography, Etching, Metrology, Scanning electron microscopy

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Proceedings Article | 4 September 2015 Paper

Product layout induced topography effects on intrafield levelling

J.-G. Simiz, T. Hasan, F. Staals, B. Le-Gratiet, W. Tel, C. Prentice, A. Tishchenko

Proceedings Volume 9661, 96610R (2015) https://doi.org/10.1117/12.2194079

KEYWORDS: Scanners, Semiconducting wafers, Polonium, Logic, Sensors, Printing, Photomasks, Electroluminescent displays, Product engineering, Optical lithography

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Proceedings Article | 19 March 2015 Paper

Predictability and impact of product layout induced topology on across-field focus control

J.-G. Simiz, T. Hasan, F. Staals, B. Le-Gratiet, P. Gilgenkrantz, A. Villaret, F. Pasqualini, W. Tel, C. Prentice, A. Tishchenko

Proceedings Volume 9424, 94241C (2015) https://doi.org/10.1117/12.2085283

KEYWORDS: Semiconducting wafers, Scanners, Sensors, Data modeling, Finite element methods, Silicon, Wafer-level optics, Convolution, Photomasks, Chemical mechanical planarization

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Showing 5 of 6 publications

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